-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Oct 12 08:19:52 2024 UTC
-- File 20240916_212313_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-09-16T21:23:16.000.000.000 to 2024-09-16T21:23:16.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240916_212313_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0318A610 0094F510 02DE8F90 01B1C850 01B49630 02B76E90 01ECD9D0 031AB530 0297EFA0 01DC1870 01321440
      01321440 01AB1E60 037E9150 00C1D9F0 00A13500 0078D7C0 02225E10 01337110 03AAC990 007FAD50 02407BF0
      02407BF0 03604600 02D06500 03B85780 02647C40 03564260 027EB1A0 00A0F4B0 00F08EE0 0288C990 01CCAD50
      01CCAD50 032AFBF0 02BF8600 03E04500 02106780 03185440 02947E60 02EF20A0 00CC5870 00AA7440 00FF4E60
      00FF4E60 0280E950 01C09DF0 0120D300 01B0BA80 0168E7C0 01DC9420 0332DE30 0355D890 027F9A60 01405750
      01405750 03E07CF0 02104280 031863C0 02945220 01DE7B30 013146A0 03A9E5F0 027D1700 01A1CE40 02B894B0
      02B894B0 03E4DEE0 0016B190 021DE950 01131DF0 019A9300 0157DA80 01FC37C0 01022C20 03833A30 03215390
      03215390 0258FD20 017483B0 01CEC260 0329A350 00BD72F0 00E3CB80 00922E40 00DB3960 02B6A5D0 01EDF730
      01EDF730 028D8650 00E5A2B0 009773E0 02DCCA10 01B2AF10 036BF890 00DE04D0 02B106B0 03E985E0 001D4710
      001D4710 0213E490 028D0B60
     
