-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Oct 12 08:08:40 2024 UTC
-- File 20240916_200908_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-09-16T20:09:12.000.000.000 to 2024-09-16T20:09:12.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240916_200908_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  003C68C0 00225CA0 023372F0 032ACB80 02BFAE40 03E07960 001045D0 02186730 031454A0 009E7EF0 00D14180
      00D14180 00B9E140 00E511E0 02979910 01DC5590 03327F50 00AB40F0 007F7040 0040C860 0260AC50 0150FA70
      0150FA70 01F88740 0104C4E0 0386A690 0045F5D0 02670F30 035488A0 007F6670 00206AA0 02305FF0 03287000
      03287000 02BC4800 03E26C00 02135A00 031AF700 02978C80 03DC4AC0 02326FA0 0095AC30 026FBD10 01586390
      01586390 03F45250 000E7B70 000946C0 000DE5A0 020B1770 030E9CC0 0289D2A0 01CD3BF0 0095D300 006F9D40
      006F9D40 005853E0 02747A10 014E4710 03E96490 001DD6D0 02133DB0 031AA360 0097F2D0 02DC0BB0 03D90730
      03D90730 031AC250 0097A370 00DC72C0 00B24BA0 02EB6E70 039ED940 0251B5E0 01796F10 03C5D890 002734D0
      002734D0 011A5750 01CBBE70 012E6140 01B951E0 0365F910 00D70590 02BC8750 01E2C4F0 0113A680 019A75C0
      019A75C0 01574F20 01FE7450 0180A730 0140F4A0 03E08EF0 0210C980 0318AD40 0294FBE0 01DE8610 0331C510
      0331C510 00A92790 02FDB450
     
