-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Oct 12 08:07:25 2024 UTC
-- File 20240916_200807_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-09-16T20:08:10.000.000.000 to 2024-09-16T20:08:10.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240916_200807_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0026D230 0035BB20 0117B350 01CE3570 009497E0 02DEDC10 01B1B210 03696B10 00DDDE90 02B331D0 01EAA930
      01EAA930 011FFDA0 03900370 025802C0 03BA01D0 00338090 022A40D0 013F60B0 01A0D0E0 0370B890 00C8E4D0
      00C8E4D0 02AC96B0 03FADDE0 0007B310 02046A90 02832FE0 02E15C00 0391F200 02590B00 03758E80 02CF49C0
      02CF49C0 03A8ED20 007C9BB0 0042D660 0263BD50 015263F0 00FDA900 0041BEC0 006161A0 0251D170 037939C0
      037939C0 02C5A520 01A777B0 0174CC60 03CEAA50 0029FF70 003D00C0 0211C050 008C9030 00CAD820 02AFB430
      02AFB430 03F86E20 00045930 000675A0 02054F70 0307E8C0 02841CA0 01C612F0 00928DC0 026DE590 015B1750
      015B1750 03F69CF0 020DD280 030B3BC0 028EA620 01C9F530 012D0FA0 03BB8870 02664C40 03AAB530 033FF7D0
      033FF7D0 00A00C30 00F00A20 02880F30 03CC08A0 002A0CF0 003F0A80 00208FC0 0030C820 0228AC30 039E7D10
      039E7D10 0228A1C0 033CF120 00A289B0 00F3CD60 028A2BD0 01CF3E30 0128A120 03BCF1B0 02628960 0153CDD0
      0153CDD0 01FD1590 0381CFA0
     
