-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Oct 12 02:26:37 2024 UTC
-- File 20240915_095032_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-09-15T09:50:35.000.000.000 to 2024-09-15T09:50:35.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240915_095032_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0252C130 03BDD0D0 00319C50 0114A930 02CF7ED0 01A8C1B0 017CA160 03C2F1D0 00238930 00324DA0 022B6B70
      022B6B70 033EDEC0 02A1B1A0 01F16970 0084EEE0 03634CC0 02D2EAA0 01BB9FF0 01665000 01D57800 013FC400
      013FC400 01A02600 01703500 01C82F80 012C3840 02DD1230 03D9CD90 00352B50 022FBEF0 03386180 02A45140
      02A45140 03F679E0 000D4510 020BE790 010E1450 03891E70 0126C8A0 01DAD670 0137BD40 01AC63E0 037A5210
      037A5210 00C77B10 02A4C690 01F6A5D0 030DF730 028B0CA0 01CE8AF0 0094E7C0 026F4A10 0158EF10 03F49890
      03F49890 000ED4D0 0209BEB0 030D61E0 008BD110 02CE3990 01A92550 037DB7F0 0161B600 00E8B680 009CEDC0
      009CEDC0 00D29B20 02BBD6B0 03E63DE0 00152310 021FB290 01106BD0 03985E30 02547120 00BF24D0 01705B50
      01705B50 03C876F0 022C4D80 033A6B40 02A75EE0 01F4F190 030E8950 0089CDF0 00CD2B00 00ABBE80 007F30E0
      007F30E0 03205440 02B07E60 01E84150 031C61F0 02925100 03DB7980 0236C540 032DA7E0 00BB7410 02E6CE10
      02E6CE10 02CAD480 01D7DF60
     
