-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Oct 12 00:32:11 2024 UTC
-- File 20240908_181528_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-09-08T18:15:31.000.000.000 to 2024-09-08T18:15:31.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240908_181528_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03092DE0 008DBB10 02CB6690 01AED5D0 0379BF30 0362B050 0069F430 022E8710 029CE240 03D29360 003BDAD0
      003BDAD0 022637B0 03352C60 00AFBA50 02F86770 038454C0 02467EA0 016541F0 00EBF080 004F0460 02688650
      02688650 015CC570 01F2A7C0 010BF420 038E0E30 02490920 016D8DB0 01DB4B60 0336EED0 0056CCD0 013ED550
      013ED550 03A1BFF0 02716000 0349D000 02ED3800 039BA400 02567600 037D4D00 02C3EB80 03A21E40 033988B0
      033988B0 0352A670 02FBF540 03860FE0 00450810 02678C10 01544A10 03FE6F10 00015890 0201F4D0 01010EB0
      01010EB0 02C0C4F0 01D05340 01387AE0 03A44790 00766450 024D5670 036BFD40 02DE03E0 01B10210 03698310
      03698310 00DD4290 0359F1E0 027A8480 0347C6C0 02E425A0 01963770 015D2CC0 01F3BAA0 030A67F0 028F5400
      028F5400 03C8FE00 022C8100 019D60C0 02A9E850 01FD1C70 01039240 01825B60 034376D0 00E2CDB0 0093AB60
      0093AB60 02DA7ED0 01B741B0 016CE160 03ED48E0 020DF640 030B0D60 008E8BD0 02C9CE30 03AD2920 007BBDB0
      007BBDB0 00466360 026552D0
     
