-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Oct 12 00:12:01 2024 UTC
-- File 20240908_164643_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-09-08T16:46:46.000.000.000 to 2024-09-08T16:46:46.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240908_164643_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01ABF5A0 037E0F70 02C108C0 03A18CA0 00714AF0 0049EF80 006D1840 005B9460 02765E50 014D7170 01EBC9C0
      01EBC9C0 011E2D20 03913BB0 0259A660 01757550 03CFCFF0 01141400 00CF0F00 00A88880 00FCCCC0 0082AAA0
      0082AAA0 02C3FFF0 03A20000 02730000 034A8000 02EFC000 03982000 012A1800 00DF8A00 00B04F00 00E86880
      00E86880 009C5CC0 00D272A0 02BB4BF0 03E6EE00 02159900 031F5580 0290FF40 03EC4070 010D3020 038BA830
      038BA830 024E7C20 01694230 01DDE320 033312B0 02AA9BE0 01FFD610 03003D10 00802390 03601920 00680AD0
      00680AD0 025C0FB0 03720860 00CB0C50 02AE8A70 03F9CF40 020528E0 0107BC90 038462D0 004653B0 0232BD30
      0232BD30 0395F1D0 005F0930 00708DA0 0248CB70 036CAEC0 02DAF9A0 01B78570 016C47C0 01DA6420 03375630
      03375630 03567E90 027EA0E0 0141F090 03E108D0 00118CB0 00194AE0 0215EF90 011F1850 03909470 0258DE40
      0258DE40 0374B160 026774E0 02AA6740 03FF54E0 0000FE90 020081D0 0100C130 0180A1A0 0340F170 02E089C0
      02E089C0 0390CD20 0058ABB0
     
