-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Oct 12 00:04:58 2024 UTC
-- File 20240908_162922_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-09-08T16:29:25.000.000.000 to 2024-09-08T16:29:25.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240908_162922_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0193F980 015A0540 01F707E0 03864200 0122B180 01B3E940 016A1DE0 03DF1310 00309A90 0228D7D0 013CBC30
      013CBC30 01A2E220 03739330 02CA5AA0 00D7BBF0 005E3300 00712A80 0049BFC0 006D6020 025BD030 03763820
      03763820 00CD2430 00ABB620 02FE6D30 03815BA0 0020FB30 02184350 011462F0 019E5380 01517A40 01F9C760
      01F9C760 030524D0 0087B6B0 00C46DE0 02A65B10 01F57690 0387E6E0 02220AC0 03330FA0 00AA8870 00FFCC40
      00FFCC40 00802A60 02C03F50 01A020F0 01703080 01C828C0 012C3CA0 01DD1170 0099CCE0 02D52A90 01BFBFD0
      01BFBFD0 03606030 02D05020 01B87830 01644420 03D66630 023D5520 0123FFB0 02D90030 03DAC010 0037A010
      0037A010 022C7010 013A4810 03A76C10 0074DA10 024EB710 0169EC90 03DD1AD0 003397B0 02152E30 038FDC90
      038FDC90 004832D0 026C2BB0 035A3E60 00F72150 028CB1F0 03CAE900 022F9D80 03385340 02A47AE0 02FB23C0
      02FB23C0 03C35910 0022F590 02338F50 012A48F0 01BF6C80 0160DAC0 01D0B7A0 0338EC70 02A49A40 03F6D760
      03F6D760 0206DE60 0282D8A0
     
