-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Oct 11 23:48:19 2024 UTC
-- File 20240908_160712_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-09-08T16:07:15.000.000.000 to 2024-09-08T16:07:15.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240908_160712_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01CF5980 0128F540 01BC8FE0 0362C810 00D3AC10 02BA7A10 01E74710 0314E490 009E96D0 0168EED0 03DC99B0
      03DC99B0 0232D560 012BBFD0 03BE6030 02615020 0151F830 01F90420 03058630 02874520 00E273D0 0149A510
      0149A510 03ED7790 001BCC50 02162A70 031D3F40 0293A0E0 01DA7090 033748D0 00ACECB0 00FA9AE0 0343EBC0
      0343EBC0 03710F10 00C98890 02AD4CD0 01FBEAB0 01061FE0 03851010 00479810 02645410 01567E10 03FD4110
      03FD4110 0201F0C0 03808450 0040C670 0060A540 0050F7E0 02788C10 0144CA10 03E6AF10 0015F890 021F04D0
      021F04D0 011086B0 02CC62F0 01D529C0 013FBD20 03A063B0 02705260 01487B50 03EC46F0 021A6580 03175740
      03175740 029CFCE0 01D28290 039DE1E0 02298880 033D4CC0 02A3EAA0 01F21FF0 010B1000 018E9800 0149D400
      0149D400 01ED3E00 011BA100 01967180 00AEA4A0 017CFB70 01C286C0 0123C5A0 03B22770 026B34C0 035EAEA0
      035EAEA0 00F1F9F0 00890500 00CD8780 00AB4440 027F7330 03A06550 007057F0 00487C00 006C4200 005A6300
      005A6300 00775280 004CFBC0
     
