-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Oct 11 23:01:28 2024 UTC
-- File 20240908_112340_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-09-08T11:23:43.000.000.000 to 2024-09-08T11:23:43.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240908_112340_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01E00500 01100780 01980440 01540660 03FE0550 000107F0 00018400 0000A300 00007940 000045E0 02006710
      02006710 01005490 03807ED0 004041B0 00606160 025051D0 01787930 01C445A0 019333B0 02AD5530 03FBFFA0
      03FBFFA0 00060070 00050040 00078060 02044050 01066070 01855040 0147F860 03E40450 000B0330 02074150
      02074150 0104E1F0 01869100 0145D980 01E73540 0114AFE0 039EF810 00518410 02794610 0145E510 03F38BC0
      03F38BC0 03052710 0087B490 02C46ED0 01A659B0 01757560 03CFCFD0 00282830 003C3C20 02222230 03333320
      03333320 00555550 013FFFF0 01A00000 01700000 01C80000 012C0000 01BA0000 01670000 01D48000 013EC000
      013EC000 01A1A000 00B8B800 00727200 004B4B00 006EEE80 005999C0 00755520 024FFFB0 03680060 00DC0050
      00DC0050 02B20070 03EB0040 030F4030 03447010 00E64810 02956C10 01DFDA10 03303710 00A82C90 02FC3AD0
      02FC3AD0 018227B0 01433460 03E2AE50 0009FCB0 02068170 0305C1C0 02872120 01C4B1B0 0126E960 03B59DD0
      03B59DD0 006F5330 0058FAA0
     
