-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Oct 11 22:22:51 2024 UTC
-- File 20240908_081144_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-09-08T08:11:47.000.000.000 to 2024-09-08T08:11:47.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240908_081144_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00BFF500 00E00F80 00900840 00D80C60 02B40A50 01EE0F70 011908C0 01958CA0 01AFA570 00BC3BE0 03711300
      03711300 0164CD40 01D6ABE0 033DFE10 00A30110 02F28190 018BC150 034E21F0 02E93100 039DA980 02537D40
      02537D40 03BD61F0 0131E880 01A91CC0 017D92A0 03C35BF0 0222F600 03338D00 02AA4B80 03FF6E40 0200D960
      0200D960 0100B5D0 01C07790 03902620 00583530 00742FA0 024E3870 03692440 02DDB660 01B36D50 036ADBF0
      036ADBF0 02DFB600 03B06D00 01342DC0 02D71D90 01BC9350 0362DAF0 02D3B780 03BA6C40 02675A60 0154F750
      0154F750 03FE8CF0 0201CA80 03012FC0 0340DC10 02705900 03487580 02EC4F40 039A68E0 00575C90 027CF2D0
      027CF2D0 01428BB0 01E3CE60 03122950 009B3DF0 006B5180 002F7CA0 0238C2F0 0324A380 02B6F240 03ED8B60
      03ED8B60 001B4ED0 0216E9B0 031D9D60 009353D0 02DAFA30 03DBC390 021B1120 011699B0 019DD560 03533FD0
      03533FD0 00FAA030 0087F020 02C40830 03A60C20 00750A30 004F8F20 01342450 01D71B30 013C96A0 03A2DDF0
      03A2DDF0 0273B300 034A6A80
     
