-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Oct 11 22:13:03 2024 UTC
-- File 20240908_080420_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-09-08T08:04:23.000.000.000 to 2024-09-08T08:04:23.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240908_080420_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01897F10 034DC090 00EB20D0 014F5850 01F47A30 02872390 02E25920 00C9BAD0 02AD67B0 03FBD460 00063E50
      00063E50 02052170 0307B1C0 02846920 01C65DB0 01257360 03B7CAD0 003617D0 01168E10 039DC910 00532D90
      00532D90 027ABB50 0147E6F0 01E41580 01161F40 019D10E0 03539890 00FA54D0 0143BF50 01F13070 0109A840
      0109A840 018D7C60 034BC250 00EE2370 009932C0 00D5ABA0 02BF7E70 03E0C140 0210A1E0 028C7880 01E52260
      01E52260 0317B350 009C6AF0 00D25F80 00BB7040 00E6C860 0295AC50 01DF7A70 0130C740 01A8A4E0 03BE7B40
      03BE7B40 0330A370 02A8F2C0 03FC8BA0 0002CE70 0003A940 00027DE0 02034310 0102E290 038393D0 00425A30
      00425A30 0231BB90 0294B320 01DEEAB0 01319FE0 03A95010 007DF810 02430410 01628610 03D3C510 003A2790
      003A2790 02273450 009A5730 026BBE50 015E6170 01F151C0 0109F920 038D05B0 024B8760 016E44D0 03D966B0
      03D966B0 0235D5E0 012F3F10 03DC5040 03193C30 0295A220 01DF7330 0130CAA0 03A8AFF0 027CF800 03428400
      03428400 02E3C600 03922500
     
