-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Oct 11 21:48:26 2024 UTC
-- File 20240908_055130_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-09-08T05:51:33.000.000.000 to 2024-09-08T05:51:33.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240908_055130_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00FE6280 008153C0 00C1FA20 02A10730 03F184A0 000946F0 000DE580 000B1740 000E9CE0 0209D290 010D3BD0
      010D3BD0 01C5D310 03273A90 00B4A7D0 02EEF430 03998E20 00554930 007FEDA0 02401B70 036016C0 02D01DA0
      02D01DA0 00DC09B0 025906B0 037585E0 00CF4710 02A8E490 01FC96D0 0302DDB0 0283B360 01C26AD0 03235FB0
      03235FB0 02B2F060 02F5C420 00C79310 02A45A90 01F677D0 030D4C30 028BEA20 01CE1F30 012910A0 03BD98F0
      03BD98F0 02635480 0352FEC0 037DC0D0 00619050 02515870 0379F440 02C50E60 01A78950 03744DF0 02CE6B00
      02CE6B00 03A95E80 027DF1C0 03430920 007146D0 0124F2D0 03B68BB0 026DCE60 015B2950 03F6BDF0 020DE300
      020DE300 030B1280 028E9BC0 03C9D620 002D3D30 021DD1D0 00899C90 02CD52D0 01ABFBB0 017E0660 03C10550
      03C10550 002187F0 00314400 0029E600 003D1500 00239F80 00192820 010ADE10 038FB110 00486990 026C5D50
      026C5D50 015A73F0 01F74A00 010CEF00 018A9880 014FD4C0 01E83EA0 018E10F0 00A48C40 00F6CA60 028DAF50
      028DAF50 01CB78F0 012EC480
     
