-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Oct 11 20:32:17 2024 UTC
-- File 20240908_025428_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-09-08T02:54:31.000.000.000 to 2024-09-08T02:54:31.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240908_025428_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  039F77E0 0050CC10 0278AA10 02A27F80 01F9A020 0182B810 03A1F200 02710B00 03498E80 02ED49C0 039BED20
      039BED20 00561BB0 007D1660 02439D50 016253F0 01D37A00 009D6380 0069E920 025D1DB0 03739360 00CA5AD0
      00CA5AD0 02AF77B0 03F8CC60 0004AA50 0206FF70 030580C0 028740A0 00E27070 0049A420 026D7630 035BCD20
      035BCD20 00F62BB0 008D3E60 02CBA150 01AE71F0 01794900 01C5ED80 01271B40 02DA4B70 01DBB760 03366CD0
      03366CD0 00AD5AB0 00FBF7E0 02860C10 01C50A10 03278F10 00B44890 02EE6CD0 01995AB0 02AAFBF0 01FFC300
      01FFC300 01002280 018033C0 01402A20 03E03F30 021020A0 011830F0 01942880 015E3CC0 01F122A0 0184D9F0
      0184D9F0 00A35A80 00F2F7C0 008B8C20 02CE4A30 03A96F20 007DD8B0 004334E0 0262AE90 0153F9D0 03FA0530
      03FA0530 030383D0 00412110 0261B190 01516950 03F9DDF0 02053300 0307AA80 02847FC0 03C64020 00256030
      00256030 0037D020 01161C10 03CE8900 0229CD80 033D2B40 02A3BEE0 01F26190 030B5150 008EF9F0 00C98500
      00C98500 00AD4780 00FBE440
     
