-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Oct 11 18:56:18 2024 UTC
-- File 20240907_191751_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-09-07T19:17:54.000.000.000 to 2024-09-07T19:17:54.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240907_191751_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01984900 01546D80 01FE5B40 010176E0 0381CD90 00412B50 0261BEF0 03516180 02F9D140 038539E0 0047A510
      0047A510 03323BC0 03559310 00FF5A90 0280F7D0 01C08C30 0120CA20 03B0AF30 0268F8A0 015C84F0 01F2C680
      01F2C680 010BA5C0 02C73B90 02D25320 01BB7AB0 0166C7E0 03D5A410 003F7610 0220CD10 0130AB90 03A8FE50
      03A8FE50 007C8170 0042C1C0 0231D090 02949C60 01DED250 0331BB70 02A966C0 03FDD5A0 00033F70 0002A0C0
      0002A0C0 0003F0A0 020208F0 03030C80 01414560 03F0F3E0 00088A10 020CCF10 010AA890 038FFCD0 004802B0
      004802B0 006C03E0 025A0210 01770310 03CC8290 021561E0 028FE880 03C81CC0 022C12A0 013A1BF0 01A71600
      01A71600 01749D00 01CED380 0129BA40 01BD6760 0363D4D0 00691F50 012EC870 01B9AC40 01657A60 03D7C750
      03D7C750 003C24F0 00223680 00332DC0 002ABB20 023FE6B0 032015E0 02580F80 01BA0420 03670630 02D48520
      02D48520 01BEC7B0 0161A460 03D17650 0039CD70 00252BC0 0037BE20 022C6130 039D28D0 0029DE50 023D3170
      023D3170 0323A9C0 02B27D20
     
