-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Oct 11 18:33:52 2024 UTC
-- File 20240907_180718_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-09-07T18:07:21.000.000.000 to 2024-09-07T18:07:21.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240907_180718_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  011EA7D0 01C8FA10 032C8710 00BAC490 02E7A6D0 019475B0 015E4F60 03F168D0 0009DCB0 000D32E0 020BAB90
      020BAB90 02873F20 00E25050 02937870 03DAC440 0237A660 012C7550 03BA4FF0 02676800 0354DC00 02FEB200
      02FEB200 0381EB00 01208F40 02D86470 03B45640 026E7D60 015943D0 03F5E230 020F1320 01089AB0 018CD7E0
      018CD7E0 034ABC10 00EFE210 034C0980 017506A0 03CF85F0 02284700 033C6480 02A256C0 03F37DA0 000AC370
      000AC370 000FA2C0 000873A0 020C4A70 018537A0 01A3D630 01723D20 03CB23B0 022EB260 0139EB50 03A51EF0
      03A51EF0 02779180 034C5940 02EA75E0 019F4F10 03A87440 033E2730 02A134A0 01F1AEF0 01097980 018DC540
      018DC540 014B27E0 03EEB410 0019EE10 02151910 011F9590 03C82FA0 00161C30 001D1220 02139B30 031A56A0
      031A56A0 00977DF0 00DCC300 00B2A280 00EBF3C0 009E0A20 02D10F30 03DCC450 00195330 0015FAA0 021F07F0
      021F07F0 03108400 0298C600 03D4A500 023EF780 03218C40 02B14A60 01E9EF50 018E8C70 00A4E520 02F697B0
      02F697B0 038DDC60 004B3250
     
