-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Oct 11 15:31:47 2024 UTC
-- File 20240906_213335_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-09-06T21:33:38.000.000.000 to 2024-09-06T21:33:38.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240906_213335_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03CD4C50 002BEA70 003E1F40 002110E0 02319890 012954D0 01DEFF50 0198C070 00AA5020 017FBC10 03C06210
      03C06210 00205310 02307A90 012847D0 03BC6430 02625620 01537D30 01FAC3A0 0307A270 014239A0 01F192B0
      01F192B0 01095BE0 038DF610 004B0D10 026E8B90 0159CE50 03F52970 020FBDC0 03086320 008C52B0 02653DF0
      02653DF0 01ABD180 017E3940 01C125E0 0321B710 00B16C90 02E9DAD0 019D37B0 0153AC60 03FA7A50 00074770
      00074770 00027260 0301A5A0 00817770 00C1CCC0 00A12AA0 02F1BFF0 03896000 024DD000 036B3800 02DEA400
      02DEA400 03B1F600 01348680 00D762E0 02BCD390 01E2BA50 0313E770 029A14C0 03D71EA0 003C91F0 0022D900
      0022D900 0033B580 002A6F40 021FAC70 01883D20 034C23B0 02EA3260 019F2B50 0350BEF0 02F8E180 03849140
      03849140 0246D9E0 0165B510 03D76F90 021E6C20 0088AD10 02CCFB90 01AA8650 037FC570 02C027C0 03A03420
      03A03420 00702E30 00483920 026C25B0 035A3760 027B9660 02A32EA0 01F2B9F0 010BE500 018E1780 01491C40
      01491C40 01ED9260 031B5B50
     
