-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Oct 11 15:12:27 2024 UTC
-- File 20240906_202806_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-09-06T20:28:09.000.000.000 to 2024-09-06T20:28:09.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240906_202806_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  000CDD40 000AB3E0 020FEA10 01081F10 038C1090 004A18D0 026F14B0 03589EE0 027A68C0 03475CA0 00E4F2F0
      00E4F2F0 00968B80 00DDCE40 00B32960 02EABDD0 019FE330 015012A0 03F81BF0 01020B00 00C18740 00A144E0
      00A144E0 02F1E690 018915D0 034D9F30 02EB50A0 019EF8F0 01518480 01F946C0 0105E5A0 01C38BB0 02912730
      02912730 03D9B4A0 00356EF0 002FD980 00383540 00242FE0 02363810 012D2410 03BBB610 00666D10 032AADC0
      032AADC0 035FFD90 00F00350 028802F0 03CC0380 022A0240 033F0360 00A082D0 02F0C3B0 0388A260 004CF350
      004CF350 01354570 00D7F3E0 02BC0A10 01E20F10 03130890 009A8CD0 02D7CAB0 03BC2FE0 00623810 02532410
      02532410 017AB610 03E3F680 010906E0 038D8590 004B4750 026EE4F0 03599680 02F55DC0 038FF320 00480AB0
      00480AB0 006C0FE0 025A0810 02BB8600 01F32280 010AB3C0 018FEA20 03481F30 02EC10A0 019A18F0 01571480
      01571480 01FC9EC0 0102D1A0 0383B970 012132E0 03D8D5C0 0234BF20 012EE0B0 01B990E0 03655890 00D7F4D0
      00D7F4D0 02BC0EB0 03E209E0
     
