-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Oct 11 12:20:19 2024 UTC
-- File 20240906_044501_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-09-06T04:45:04.000.000.000 to 2024-09-06T04:45:04.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240906_044501_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00D7DF10 02BC3090 02F11460 02C4CF20 00D35450 02BAFE70 03E78140 021441E0 011E6110 03915190 0059F950
      0059F950 027505F0 034F8700 02E84480 01CE3360 03949560 005EDFD0 0271B030 03496820 00EDDC30 009B3220
      009B3220 02D6AB30 03BDFEA0 006301F0 00528100 003DE0C0 02118850 01194C70 0195EA40 015F1F60 03F090D0
      03F090D0 0008D8B0 000CB4E0 020AEE90 010F99D0 03885530 03263FD0 005A9010 0277D810 014C3410 03EA2E10
      03EA2E10 001F3910 0210A590 0118F750 03948CF0 025ECA80 0371AFC0 0364BC10 026B7100 035EC980 02F1AD40
      02F1AD40 03897BE0 004DC610 026B2510 015EB790 03F1EC50 00091A70 000D9740 0205AE70 0183BCA0 034262F0
      034262F0 02E35380 0392FA40 025B8760 017644D0 03CD66B0 022BD5E0 013E3F10 03A12090 0238D860 02925A20
      02925A20 01DB7730 0136CCA0 03ADAAF0 027B7F80 0346C040 02E5A060 01977050 035CC870 02F2AC40 03C5FD30
      03C5FD30 031381D0 009A4130 00D761A0 02BCD170 03E2B9C0 0213E520 011A17B0 01971C60 035C9250 00F2DB70
      00F2DB70 0045DB60 03339B60
     
