-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Oct 11 11:22:28 2024 UTC
-- File 20240905_224654_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-09-05T22:46:57.000.000.000 to 2024-09-05T22:46:57.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240905_224654_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03F4DEE0 000EB190 0209E950 010D1DF0 018B9300 014E5A80 01E977C0 028EE610 02E4CA80 01CB57E0 03977E00
      03977E00 012E6080 01B950C0 0165F8A0 03D704F0 023C8680 0322C5C0 02B3A720 01EA74B0 011F4EE0 0390E990
      0390E990 022C4EA0 009D34F0 00D3AE80 00BA79C0 00E74520 0294E7B0 03DE9460 0031DE50 02293170 033DA9C0
      033DA9C0 02A37D20 00F961D0 0142E890 03E39CD0 001252B0 001B7BE0 0216C610 011DA510 03937790 005ACC50
      005ACC50 0277AA70 034C7F40 03752070 0167D820 03D43430 023E2E20 01213930 01B1A5A0 03697770 02DDCCC0
      02DDCCC0 03B32AA0 006ABFF0 005FE000 00380800 00120600 001B0500 00168780 001DC440 00132660 021AB550
      021AB550 0117EFF0 019C1800 01521400 01FB1E00 00834880 00617660 0251CD50 01792BF0 01C5BE00 01276100
      01276100 01B4D180 016EB940 01D9E5E0 03351710 00AF9C90 037C2960 02611EE0 01519190 03F95950 0005F5F0
      0005F5F0 00070F00 00048880 0006CCC0 0005AAA0 02077FF0 0304C000 01435000 00F17C00 0089C200 00CD2300
      00CD2300 00ABB280 00FE6BC0
     
