-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Oct 11 09:56:52 2024 UTC
-- File 20240905_185856_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-09-05T18:58:59.000.000.000 to 2024-09-05T18:58:59.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240905_185856_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03FEAB30 0201FEA0 010101F0 01818100 01414180 01E1E140 011111E0 03999910 00555590 027FFF50 014000F0
      014000F0 01E00080 011000C0 019800A0 035400F0 02FE0080 038100C0 0320C050 00B0A070 00E8F040 009C8860
      009C8860 02D2CC50 01BBAA70 01667F40 01D540E0 033FE090 00A010D0 01780C50 01E20530 011307A0 039A8470
      039A8470 0257C640 037C2560 00C237D0 02A32C30 03F2BA20 000BE730 000E14A0 01048F70 00C36460 02A2D650
      02A2D650 01F3BD70 010A63C0 018F5220 0348FB30 02EC86A0 019AC5F0 0157A700 01FC7480 00812760 0360DA60
      0360DA60 00D0B750 02B8ECF0 03E49A80 0216D7C0 031DBC20 00936230 00DAD320 02B7BAB0 03EC67E0 020D2A00
      020D2A00 0185DF80 01473040 01E4A860 0316FC50 009D8270 00D34340 00BAE2E0 02E79390 01945A50 035E7770
      035E7770 0178A660 03E27AA0 001347F0 001AE400 00179600 001C5D00 00127380 001B4A40 0016EF60 021D98D0
      021D98D0 011354B0 02CD7F70 01D5E060 033F1050 00A09870 00F0D440 0088BE60 02CCE150 01AA91F0 017FD900
      017FD900 01C03580 01202F40
     
