-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Oct 11 07:30:36 2024 UTC
-- File 20240905_131753_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-09-05T13:17:56.000.000.000 to 2024-09-05T13:17:56.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240905_131753_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01D54900 013FED80 01A01B40 017016E0 03C81D90 002C1350 011D0D70 00C9C5E0 03569380 017EED20 01E0CDD0
      01E0CDD0 0310AB30 0298FEA0 01D481F0 013EC100 01A1A180 01717140 01C9C9E0 032D2D10 00BBBB90 03733320
      03733320 00655550 0257FFF0 037C0000 02C20000 03A30000 02728000 034BC000 02EE2000 03993000 0255A800
      0255A800 01BFBE00 00B03080 00E828C0 009C3CA0 02D222F0 03BB3380 0266AA40 0355FF60 00FF00D0 028080B0
      028080B0 03C0C0E0 02105040 038C3C30 024A2220 016F3330 01D8AAA0 0334FFF0 02AE8000 03F9C000 02052000
      02052000 0307B000 02846800 01E32E00 00895C80 00CDF2C0 00AB0BA0 02FE8E70 0381C940 02412DE0 0161BB10
      0161BB10 03D16690 0039D5D0 02253F30 039BD050 002B1C30 003E9220 0221DB30 033136A0 00A9ADF0 00FD7B00
      00FD7B00 0083C680 00C225C0 00A33720 02F2ACB0 03C5FD70 011381E0 039A4110 00576190 027CD150 0142B9F0
      0142B9F0 01E3E500 01121780 019B1C40 01569260 03FDDB50 00019B70 0000AB60 0200FED0 010081B0 0180C160
      0180C160 0340A1D0 00E0F130
     
