-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Oct 11 06:45:11 2024 UTC
-- File 20240905_100326_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-09-05T10:03:29.000.000.000 to 2024-09-05T10:03:29.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240905_100326_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0380F760 00408CD0 0260CAB0 0350AFE0 00F8F810 02848410 01C6C610 0325A510 00B77790 03766620 0066AA90
      0066AA90 032AFFE0 025FC000 03702000 02C83000 03AC2800 027A3C00 03472200 02E4B300 0396EA80 025D9FC0
      025D9FC0 03735020 00657C10 032BE100 02BE1180 03E11940 021195E0 01195F10 0395F090 005F08D0 02708CB0
      02708CB0 0348CAE0 00ECAF90 034D7C20 0075E110 024F1190 01689950 03DCD5F0 0232BF00 032BE080 02BE10C0
      02BE10C0 03E118A0 001194F0 00195E80 000AF8E0 0307C240 02842360 01C632D0 03252BB0 02B7BE60 01EC6150
      01EC6150 031A51F0 02977900 03DCC580 0232A740 0395FA70 012F83A0 03B84270 02646340 035652E0 00FD7B90
      00FD7B90 0283C650 01C22570 012337C0 01B2AC20 036BFA30 036F0390 026C4120 015A61B0 01F75160 030CF9D0
      030CF9D0 008A8530 00CFC7A0 02A82470 03FC3640 02022D60 01033BD0 01C15310 0390FD40 025883E0 0174C210
      0174C210 03CEA310 0029F290 023D0BD0 01238E30 01B24920 036B6DB0 02DEDB60 02D8DB60 02DA5B60 01B776D0
      01B776D0 036CCDB0 02DAAB60
     
