-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Oct  7 23:40:06 2024 UTC
-- File 20240830_044105_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-08-30T04:41:08.000.000.000 to 2024-08-30T04:41:08.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240830_044105_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  031BA580 02967740 03DD4CE0 0033EA90 022A1FD0 013F1030 02D04C10 02DC3500 01D917C0 029ACE10 01D7A910
      01D7A910 033C7D90 00A24350 02F362F0 038AD380 024FBA40 03686760 00DC54D0 02B27EB0 03F5A0F0 0107B840
      0107B840 01846460 03465650 00E57D70 0097C3C0 00DC2220 02B23330 03EB2AA0 001EBFF0 0011E000 000C8800
      000C8800 00056600 0007D500 00043F80 00062040 00053060 0207A850 01047C70 01864240 01456360 03E7D2D0
      03E7D2D0 000A1DD0 01078990 03844D50 00466BF0 00655E00 0057F100 007C0980 00420D40 00630BE0 02528E10
      02528E10 017BC910 03E316C0 03094ED0 008DE9B0 00CB1D60 02AE93D0 01F9DA30 01053720 0387ACB0 02447AE0
      02447AE0 01664790 03D56450 001FEB30 02080F50 010C08F0 018A0C80 014F0AC0 01E88FA0 031CC870 0292AC40
      0292AC40 03DBFA60 00360750 022D04F0 019DC340 02A99170 03FD59C0 0203F520 01020FB0 01830860 03428C50
      03428C50 00E3CA70 00922F40 00DB38E0 02B6A490 02F6FB60 02C6C360 01A5A2D0 037773B0 02CCCA60 01AAAF50
      01AAAF50 037FF8F0 02C00480
     
