-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Oct  7 23:23:53 2024 UTC
-- File 20240830_030618_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-08-30T03:06:21.000.000.000 to 2024-08-30T03:06:21.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240830_030618_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  031F4480 0290E6C0 03D895A0 0034DF70 002EB0C0 0039E8A0 01128E70 00CDE4A0 01558B70 00FFA760 028074D0
      028074D0 01C04EB0 012069E0 03B05D10 00687390 025C4A50 01726F70 01CB58C0 012EF4A0 01DCC770 00995260
      00995260 02D5FB50 01BF06F0 01608580 01D0C740 0138A4E0 03A4F690 00768DD0 024DCB30 036B2EA0 006F5CF0
      006F5CF0 002C7940 003A45E0 02276710 0134D490 03AEBED0 0079E1B0 00451160 026799D0 01545530 01FE7FA0
      01FE7FA0 0180A030 02A07810 01F04410 03086610 008C5510 02CA7F90 01AF4050 0378E070 02C49040 03A6D860
      03A6D860 0075B450 0127B730 02DA3650 01B72D70 016CBBC0 01DAE620 03379530 02AC5FA0 01FA7070 01074840
      01074840 0184EC60 03469A50 0072EBB0 0225CF30 033728A0 00ACBCF0 00FAE280 008793C0 00C45A20 02A67730
      02A67730 03F54CA0 000FEAF0 00081F80 00060820 01028610 0383C510 00422790 02633450 0152AE70 01FBF940
      01FBF940 010605E0 03850710 00478490 026446D0 00AB32D0 017F55D0 03C0FF30 022080A0 0130C0F0 01A8A080
      01A8A080 017CF0C0 01C288A0
     
