-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Oct  7 21:34:42 2024 UTC
-- File 20240829_195510_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-08-29T19:55:13.000.000.000 to 2024-08-29T19:55:13.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240829_195510_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  021C73C0 03124A20 009B6F30 00D6D8A0 02BDB4F0 03E36E80 0212D9C0 031BB520 00966FB0 00DD5860 02B3F450
      02B3F450 01EA0E70 008F84A0 01642370 01D632C0 013D2BA0 03A3BE70 02726140 034B51E0 00EEF910 02998590
      02998590 01D54750 033FE4F0 01500B40 02FC0770 038204C0 024306A0 016285F0 01D3C700 013A2480 01A736C0
      01A736C0 0174ADA0 03CEFB70 022986C0 039EA2D0 0028F9D0 023C8530 0322C7A0 00B3A470 00EA7640 009F4D60
      009F4D60 02D0EBD0 01B89E30 0164D120 03D6B9B0 031EF2B0 0348C5F0 02ECA700 039AF480 02578EC0 037C49A0
      037C49A0 00C26D70 00A35BC0 00F2F620 028B8D30 03CE4BA0 0014B730 020F7650 0108CD70 018CABC0 014AFE20
      014AFE20 03EF8130 021841A0 01146170 019E51C0 01517920 03F9C5B0 030293B0 0341ED30 02E11BA0 01919670
      01919670 01595D40 01F5F3E0 030F0A10 00888F10 02CCC890 01AAACD0 037FFAB0 036003F0 01680100 01DC0180
      01DC0180 01320140 01AB01E0 037E8110 00C1C190 02A12150 01F1B1F0 01096900 018DDD80 00A599A0 017BAAB0
      017BAAB0 01C67FE0 03254010
     
