-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Oct  7 18:31:50 2024 UTC
-- File 20240829_073426_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-08-29T07:34:29.000.000.000 to 2024-08-29T07:34:29.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240829_073426_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0028C040 003CA060 0222F050 01338870 01AA4C40 017F6A60 03C0DF50 0020B0F0 0030E880 00144E60 030F34A0
      030F34A0 00445770 00333E60 022AA150 013FF1F0 01A00900 01700D80 01C80B40 012C0EE0 03BA0990 00670D50
      00670D50 02548BF0 01BF6700 00B06A40 00E85F60 029C70D0 01D248B0 013B6CE0 03A6DA90 0075B7D0 024F6C30
      024F6C30 0368DA20 00DCB730 02597650 00BAE6B0 00E795E0 02945F10 01DE7090 033148D0 00A9ECB0 00FD1AE0
      00FD1AE0 02839790 01C25C50 03237270 015965A0 01FAEBB0 01079E60 03845150 004679F0 00654500 0057E780
      0057E780 007C1440 00421E60 02631150 015299F0 00FDEA80 00418FE0 02614810 0151EC10 03F91A10 00059710
      00059710 02075C90 0104F2D0 03868BB0 0245CE60 01672950 01EA5EF0 008FB8C0 00C864A0 02AC56F0 03FA7D80
      03FA7D80 02074340 0304E2E0 00869390 02C5DA50 01A73770 0174ACC0 02E77D50 00CA61F0 00AF5100 00F8F980
      00F8F980 00848540 00C6C7E0 02A5A410 01F77610 030CCD10 008AAB90 02CFFE50 00D400B0 025F0070 03708040
      03708040 02C8C060 01ACA050
     
