-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Oct  7 18:26:48 2024 UTC
-- File 20240829_073035_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-08-29T07:30:38.000.000.000 to 2024-08-29T07:30:38.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240829_073035_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03A3BA30 02726720 00A5AA50 017BBFB0 02E33030 0392A820 005BFC30 00760220 024D0330 036B82A0 00DE43F0
      00DE43F0 00B16200 00E9D300 009D3A80 0069D3E0 032E9D00 02B9D380 03E53A40 0217A760 011C74D0 03924EB0
      03924EB0 025B69E0 0176DD10 03CDB390 002B6A50 011F6FB0 02C86C30 03AC5A20 007A7730 00474CA0 0264EAF0
      0264EAF0 03569F80 02FDD040 03833860 0042A450 0263F670 01A906A0 01BEC2F0 0161A380 01D17240 0139CB60
      0139CB60 03A52ED0 0077B9B0 004C6560 026A57D0 015F7C30 01F0C220 01845190 03A33CA0 0072A2F0 004BF380
      004BF380 006E0A40 00590F60 027588D0 014F4CB0 01E8EAE0 031C9F90 0092D050 016DDC30 02ED9910 019B5590
      019B5590 0356FF50 00FD80F0 00834080 00C2E0C0 00A390A0 02F258F0 038B7480 024ECEC0 03B4D4D0 00375F50
      00375F50 022CF0F0 033A8880 02A7CCC0 03F42AA0 000E3FF0 00092000 000DB000 000B6800 000EDC00 0004D900
      0004D900 00035AC0 0002F7A0 02038C70 03024A40 02836F60 01C2D8D0 0323B4B0 02B26EE0 01EB5990 031EF550
      031EF550 0048C7F0 00365200
     
