-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Sep 29 05:38:36 2024 UTC
-- File 20240824_032243_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-08-24T03:22:46.000.000.000 to 2024-08-24T03:22:46.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240824_032243_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  028B74D0 01CECEB0 0294D4F0 03DEBE80 0231E1C0 03291120 00BD99B0 00E35560 0292FFD0 01DB8030 01364020
      01364020 03AD6030 033DE810 02518E00 03794900 02C5ED80 03A71B40 027496E0 014EDD90 03E9B350 001D6AF0
      001D6AF0 0013DF80 001A3040 020B9430 03872F10 0044B890 0266E4D0 015596B0 01FF5DE0 0300F310 00808A90
      00808A90 02C0CFD0 01A0A830 0170FC20 01E44110 038B30C0 024EA8A0 0169FCF0 01DD0280 013383C0 01AA4220
      01AA4220 037F6330 02C0D2A0 01A0BBF0 0170E600 00E44A80 004B37E0 026EAC10 0159FA10 03F50710 000F8490
      000F8490 020846D0 010C65B0 018A5760 034F7CD0 00E8C2B0 024E51F0 01B4BC80 016EE2C0 01D993A0 03355A70
      03355A70 02AFF740 03F80CE0 00040A90 02060FD0 01050830 01878C20 01A22510 03B99BC0 02655620 0157FD30
      0157FD30 01FC03A0 03020270 02830340 03C282E0 0023C390 02322250 012B3370 00DF5560 03587FE0 00F44010
      00F44010 028E6010 01C95010 032DF810 00BB0410 02E68610 0195C510 035F2790 00F0B450 01447730 02F32650
      02F32650 018AB570 014FEFC0
     
