-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Sep 29 04:37:43 2024 UTC
-- File 20240824_022018_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-08-24T02:20:21.000.000.000 to 2024-08-24T02:20:21.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240824_022018_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  000EBC70 0009E240 000D1360 020B9AD0 010E57B0 02C4BE30 03D37090 021D6460 0289EB20 01CD1EB0 012B91E0
      012B91E0 03BE5910 00617590 0251CF50 017928F0 01C5BC80 012762C0 01B4D3A0 01B75D30 02B679D0 01ED4530
      01ED4530 011BE7A0 03961470 025D1E40 03739160 00CA59D0 02AF7530 03F8CFA0 0004A870 00037E20 01016090
      01016090 0381D0D0 004138B0 0061A4E0 02517690 0179CDD0 03C52B30 0227BEA0 013461F0 01AE5100 00BCBCC0
      00BCBCC0 02717150 0149C9F0 01ED2D00 011BBB80 01966640 015D5560 03F3FFD0 000A0030 000F0020 02088030
      02088030 03866010 0222A800 0333FC00 02AA0200 03FF0300 02008280 0300C3C0 0280A220 01C0F330 01208AA0
      01208AA0 03B0CFF0 01345400 00D73F00 00BCA080 00E2F0C0 009388A0 02DA4CF0 03B76A80 026CDFC0 035AB020
      035AB020 00F7E830 008C1C20 01650910 03EBC6C0 021E25A0 01113770 0199ACC0 01557AA0 03FFC7F0 02002400
      02002400 03003600 02802D00 03C03B80 01101320 01CC0D50 032A0BF0 02BF0E00 03E08900 0210CD80 0318AB40
      0318AB40 0294FEE0 01DE8190
     
