-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Sep 29 00:52:18 2024 UTC
-- File 20240823_201730_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-08-23T20:17:33.000.000.000 to 2024-08-23T20:17:33.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240823_201730_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  019E2CA0 01A89D70 017CD3C0 01C2BA20 0323E730 02B214A0 01EB1EF0 011E9180 0191D940 015935E0 03F5AF10
      03F5AF10 0207BC40 03823130 024329A0 0162BD70 01D3E3C0 013A1220 03A71B30 027496A0 014EDDF0 01E9B300
      01E9B300 011D6A80 00C9EFE0 03568C00 02FDCA00 03832F00 0242B880 0363E4C0 02D216A0 01BB1DF0 01669300
      01669300 01D5DA80 013F37C0 02D05610 02DC3E80 03B221C0 026B3120 015EA9B0 01F1FD60 030903D0 008D8230
      008D8230 00CB4320 02AEE2B0 03F993E0 0202AD00 0181FDC0 01410320 03E182B0 021143E0 0119E210 03951310
      03951310 005F9A90 027057D0 01487C30 01EC4220 018D3190 03A5D4A0 00773EF0 004CA180 006AF140 005F89E0
      005F89E0 02704D10 01486B90 03EC5E50 001A7170 001749C0 020E7690 0284A6E0 01C6F590 03258F50 00B748F0
      00B748F0 00ECEC80 009A9AC0 00D7D7A0 02BC3C70 03E22240 02133360 028D5560 02E5FFE0 01970010 035C8010
      035C8010 00F2C010 028BA010 01CE7010 03294810 00BDEC10 02E31A10 01929710 03ADEE40 033D8CB0 02A34AE0
      02A34AE0 01F2EF90 030B9850
     
