-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Sep 28 08:07:41 2024 UTC
-- File 20240823_155926_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-08-23T15:59:29.000.000.000 to 2024-08-23T15:59:29.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240823_155926_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  024EA400 01B4FB00 00B74340 02767170 034D49C0 02EBED20 019E1BB0 01511660 03F99D50 000553F0 0007FA00
      0007FA00 00040700 00060480 00028360 0301E160 008111D0 02C19930 03A155A0 0071FF70 004900C0 006D80A0
      006D80A0 025B40F0 0376E080 02CD90C0 03D5AC50 001FBD30 001063A0 02185270 03147B40 029E46E0 01D16590
      01D16590 0339D750 00A53CF0 00F7A280 008C73C0 02652510 02ABDBC0 03FE3620 00012D30 0001BBA0 02016670
      02016670 0301D540 02813FE0 01C1A010 03217010 00B1C810 03749600 01676E80 01D4D9C0 013EB520 03A1EFB0
      03A1EFB0 02711860 01499450 03ED5E70 021BF140 031609E0 009D0D10 0369C5C0 036E9390 00D9DA50 02B53770
      02B53770 03EFACC0 02187AA0 011447F0 019E6400 01515600 01F9FD00 01050380 00C3C120 015110D0 03F998B0
      03F998B0 020554E0 0107FE90 038401D0 00460130 006501A0 02578170 037C41C0 02C26120 00D1A8D0 015CBE50
      015CBE50 03F2E170 020B91C0 030E5920 008975B0 00CDCF60 02AB28D0 01FEBCB0 0101E2E0 03811390 0220CD20
      0220CD20 009855D0 02D47F30
     
