-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Sep 28 06:24:22 2024 UTC
-- File 20240823_075129_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-08-23T07:51:32.000.000.000 to 2024-08-23T07:51:32.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240823_075129_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0212BD30 031BE3A0 00961270 00DD1B40 0259CB70 03752EC0 02CFB9A0 01A86570 017C57C0 01C27C20 03234230
      03234230 02B2E320 01EB92B0 011E5BE0 03C8BB00 01167340 019D4AE0 0353EF90 00FA1850 02871470 03C49E40
      03C49E40 0226D160 0135B9D0 03AF6530 0278D7A0 00A25E30 0279B890 014564D0 03E7D6B0 02143DE0 011E2310
      011E2310 03913290 0059ABD0 02757E30 034FC120 00E821B0 024E18B0 03B48A70 026ECF40 0359A8E0 00F57C90
      00F57C90 028FC2D0 01C823B0 012C3260 03BA2B50 00673EF0 0054A180 003F78A0 01106270 01985340 01547AE0
      01547AE0 03FE4790 00016450 0201D670 03013D40 0281A3E0 01C17210 0321CB10 02589740 03BA6E70 02675940
      02675940 0354F5E0 00FE8F10 0281C890 01C12CD0 0321BAB0 02B167E0 01E9D410 031D3E10 0249D080 01B69C60
      01B69C60 036DD250 00DB3B70 00B6A6C0 00EDF5A0 029B0F70 03D688C0 023DCCA0 01232AF0 01B2BF80 00B5F020
      00B5F020 01778410 03CC4610 002A6510 023F5790 0120FC50 03B08270 0268C340 035CA2E0 00F2F390 028B8A50
      028B8A50 00E727B0 024A5A30
     
