-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Sep 28 05:45:23 2024 UTC
-- File 20240823_063800_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-08-23T06:38:03.000.000.000 to 2024-08-23T06:38:03.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240823_063800_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0133C1F0 01AA2100 017F3180 01C0A940 0120FDE0 03B08310 0068C290 025CA3D0 00B97910 02E5C590 01972750
      01972750 035CB4F0 02F2EE80 038B99C0 024E5520 01697FB0 01DDC060 03332050 00555830 023FFA10 01200710
      01200710 03B00490 006806D0 025C05B0 03720760 00CB04D0 02AE86B0 03F9C5E0 00052710 0303DA40 03411BB0
      03411BB0 02E19660 01915D50 0359F3F0 02F50A00 038F8F00 02484880 036C6CC0 02DA5AA0 01B777F0 00B66600
      00B66600 0076AA80 004DFFC0 006B0020 025E8030 0371C020 00C92030 00ADB020 02FB6830 0386DC20 0045B230
      0045B230 0233B590 029537A0 01DFAC70 01307A40 01A84760 037C64D0 00C256B0 00A37DE0 02F2C310 018BA290
      018BA290 034E73D0 0074A510 03277BC0 02B4C620 01EEA530 0119F7A0 03950C70 025F8A40 03704F60 00C868D0
      00C868D0 02AC5CB0 03FA72E0 0203A5C0 03813B90 0041A650 02617570 0351CFC0 02F92820 0185BC30 01476220
      01476220 03E4D330 0216BAA0 011DE7F0 00C98A00 0056A780 007DF440 00430E60 02628950 0153CDF0 01FA2B00
      01FA2B00 01073E80 0184A1C0
     
