-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Sep 28 04:58:30 2024 UTC
-- File 20240823_054841_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-08-23T05:48:44.000.000.000 to 2024-08-23T05:48:44.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240823_054841_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02008040 0300C060 0080A050 02C0F070 03A08840 0270CC60 0148AA50 03ECFF70 021A80C0 0317C0A0 009C20F0
      009C20F0 00691840 022ECA30 0339AF20 00A578B0 00F7C4E0 028C2690 01CA35D0 032F2F30 02B8B8A0 01E4E4F0
      01E4E4F0 01169680 00CEEEE0 0354CCC0 02FEAAA0 0181FFF0 01410000 01E18000 01114000 0199E000 01551000
      01551000 01FF9800 01005400 00C03F00 00501040 00781860 02441450 01661E70 01D51140 013F99E0 03A05510
      03A05510 00707F90 02484050 016C6070 00ED2820 014DDE10 03EB3110 001EA990 0211FD50 011903F0 01958200
      01958200 015F4300 01F0E280 010893C0 018CDA20 01A55B90 03BBFB20 006606B0 005505E0 027F8710 01404490
      01404490 03E066D0 001055B0 00187F60 021440D0 011E60B0 02C8A870 01D67E20 033D4130 02A3E1A0 01F21170
      01F21170 010B19C0 018E9520 0349DFB0 02ED3060 019BA850 03567C70 017EA120 01E0F8D0 031084B0 0298C6E0
      0298C6E0 01D4A590 033EF750 00A18CF0 00F14A80 0089EFC0 00CD1820 02AB9430 03FF2F10 02005C40 03007260
      03007260 00804B50 02C06EF0
     
