-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Sep 28 03:37:39 2024 UTC
-- File 20240823_040512_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-08-23T04:05:15.000.000.000 to 2024-08-23T04:05:15.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240823_040512_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0180DAA0 0340B7F0 02E0EC00 03909A00 0258D700 0374BC80 02CEE2C0 03A993A0 003EAD30 0210FDD0 01188330
      01188330 0194C2A0 035EA3F0 02F1F200 03890B00 024D8E80 036B49C0 02DEED20 01B19BB0 02B4AB30 03F77F50
      03F77F50 000CC0F0 000AA080 000FF0C0 000808A0 020C0CF0 030A0A80 028F0FC0 03C88820 002CCC30 021D5510
      021D5510 0289FFC0 03CD0020 002B8030 003E4020 02216030 0331D020 00A93830 00FDA420 02837630 03C2CD20
      03C2CD20 0011D5D0 010C9F90 038AD050 004FB870 00686440 005C5660 02727D50 014B43F0 01EEE200 01199300
      01199300 01955A80 00AFFBE0 037C0300 02C20280 03A303C0 02728220 014BC330 01EE22A0 031933F0 0295AA00
      0295AA00 03DF7F00 0230C080 01945060 03AF3C20 0078A230 0044F320 02668AB0 0355CFE0 00FF2810 0280BC10
      0280BC10 01C0E210 03209310 00B0DA90 03745BE0 02673B00 0354A680 02FEF5C0 03818F20 004148B0 0061ECE0
      0061ECE0 02511A90 017997D0 03C55C30 0227F220 009A0590 036B83A0 00DE4270 00B16340 00E9D2E0 029D3B90
      029D3B90 01D3A650 033A7570
     
