-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Sep 28 02:52:01 2024 UTC
-- File 20240823_020025_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-08-23T02:00:28.000.000.000 to 2024-08-23T02:00:28.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240823_020025_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01FA0FF0 01070800 01848C00 0146CA00 01E5AF00 01177880 019CC4C0 02A95350 00FEFD70 0040C1E0 03305080
      03305080 01543C60 03FE2250 00013370 0001AAC0 00017FA0 0201C070 03012040 0281B060 01C16850 0321DC70
      0321DC70 01589920 01FA6AD0 03075FB0 0284F060 01C68850 0325CC70 02B72A40 03ECBF60 001AE0D0 021790B0
      021790B0 031C58E0 02493A40 03B6D3B0 026DBA60 015B6750 03F6D4F0 020DBE80 030B61C0 028ED120 01C9B9B0
      01C9B9B0 012D6560 03BBD7D0 00331E10 03154880 029FECC0 03D01AA0 003817F0 00241C00 00361200 002D1B00
      002D1B00 003B9680 00265DC0 00357320 0117E550 01CE0BF0 01290E00 01BD8900 01634D80 01D2EB40 013B9EE0
      013B9EE0 03A65190 00757950 024FC5F0 03682700 016E1A40 02EC8BB0 039ACE60 0057A950 027C7DF0 03424300
      03424300 02E36280 0392D3C0 025BBA20 01766730 01CD54A0 0195FF70 00AF8060 02F84050 01846070 01465040
      01465040 01E57860 0317C450 009C2670 00D23540 00BB2FE0 02E6B810 02CAF200 01D7C580 013C2740 01A234E0
      01A234E0 03732E90 00CAB9D0
     
