-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Sep 28 01:49:41 2024 UTC
-- File 20240822_233649_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-08-22T23:36:52.000.000.000 to 2024-08-22T23:36:52.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240822_233649_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  008CC140 00CAA1E0 0357F880 02FC04C0 038206A0 004305F0 00628700 0053C480 007A26C0 004735A0 0264AF70
      0264AF70 0356F8C0 037EC250 0060D1B0 0050B960 0278E5D0 01449730 01E6DCA0 0315B2F0 029F6B80 03D0DE40
      03D0DE40 0238B160 0124E9D0 01DB4E90 039B74E0 0056CE90 027DA9D0 01437D30 01E2C3A0 0313A270 029A7340
      029A7340 03D74AE0 003CEF90 02229850 0099EA30 026A8F90 015FC850 03F02C70 02083A40 030C2760 008A34D0
      008A34D0 02CF2EB0 03A8B9E0 007CE510 02429790 02B1EE20 00F48C90 028ECAD0 01C9AFB0 012D7860 03BBC450
      03BBC450 00662670 00553540 007FAFE0 02407810 01604410 03E83300 010E1540 01891FE0 034D9010 00EB5810
      00EB5810 029EF410 01D18E10 03394910 00A5ED90 02F71B50 018C96F0 00A56EC0 027BECD0 01461AB0 01E517E0
      01E517E0 03179C10 009C5210 02D27B10 01BB4690 0366E5D0 00D59730 00BF5CA0 01707970 00E422E0 02963390
      02963390 01DD2A50 0333BF70 02AA60C0 03FF50A0 0000F8F0 00008480 0000C6C0 0000A5A0 01007BB0 02C02330
      02C02330 03A032A0 00702BF0
     
