-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Sep 28 01:09:24 2024 UTC
-- File 20240822_231444_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-08-22T23:14:47.000.000.000 to 2024-08-22T23:14:47.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240822_231444_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  032DADF0 02BB7B00 03E6C680 0215A5C0 038FBB90 02243320 01362AB0 01AD3FE0 037BA010 00C67010 02A54810
      02A54810 01F7EC10 030C1A10 008A1710 02CF1C90 02D44960 02DF36E0 01B0AD90 0368FB50 00DC86F0 00B2C580
      00B2C580 00EBA740 009E74E0 02D14E90 01B9E9D0 03651D30 036BC9D0 006F1690 02589DD0 0174D330 01CEBAA0
      01CEBAA0 0329E7F0 02BD1400 03E39E00 02125100 031B7980 0296C540 03EED3F0 010CDD00 018AB380 014FEA40
      014FEA40 01E81F60 031C10D0 009218B0 00DB14E0 02B69E90 01EDD1D0 031B3930 034B52D0 00777DD0 024CC330
      024CC330 036AA2A0 00DFF3F0 00B00A00 00E80F00 009C0880 00D20CC0 00BB0AA0 02E68FF0 01CAE400 0097CB00
      0097CB00 00DC2E80 00B239C0 00EB2520 029EB7B0 03D1EC60 00391A50 02259770 03375CC0 02ACF2A0 00FD45F0
      00FD45F0 0041F380 00610A40 00518F60 027948D0 0145ECB0 01E71AE0 03149790 009EDC50 02D1B270 03B96B40
      03B96B40 0332EF70 0155CC60 03FF2A50 0000BF70 0000E0C0 000090A0 0200D8F0 0300B480 0280EEC0 03C099A0
      03C099A0 0020D570 00185FE0
     
