-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Sep 27 05:18:10 2024 UTC
-- File 20240822_204547_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-08-22T20:45:50.000.000.000 to 2024-08-22T20:45:50.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240822_204547_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0313AC10 009A7A10 02D74710 01BCE490 036296D0 00D3DDB0 00BA3360 03739560 02652FE0 02ABDC00 03FE3200
      03FE3200 02012B00 0301BE80 028161C0 03C1D120 002139B0 0031A560 022977D0 013DCC30 02D19510 02DCAFC0
      02DCAFC0 03B2F820 006B8430 005E4620 02716530 0349D7A0 00ED3C70 009BA240 00D67360 02BD4AD0 00F1F7D0
      00F1F7D0 01448610 03E6C510 0015A790 021F7450 0110CE70 0198A940 0154FDE0 03FE8310 0001C290 020123D0
      020123D0 0080D910 03605AC0 02D077A0 01B84C70 01646A40 01D65F60 033D70D0 00A3C8B0 00F22CE0 028B3A90
      028B3A90 01CEA7D0 0194FA10 03AF4380 0278E240 03449360 00E6DAD0 0295B7B0 03DF6C60 0030DA50 0228B770
      0228B770 033CECC0 02A29AA0 00F9EBF0 00428F00 0063C880 00522CC0 007B3AA0 0246A7F0 0365F400 02D70E00
      02D70E00 03BC8900 0262CD80 0353AB40 037D3F70 0161D060 03D13850 0039A470 00257640 0037CD60 022C2BD0
      022C2BD0 013A3E30 01A72120 0374B1B0 02CEE960 02D4CEE0 02DF54C0 03B0FEA0 006881F0 005CC100 0072A180
      0072A180 004BF140 006E09E0
     
