-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Sep 27 00:32:39 2024 UTC
-- File 20240822_063358_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-08-22T06:34:01.000.000.000 to 2024-08-22T06:34:01.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240822_063358_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0158DEA0 03F4B1F0 020EE900 03099D80 028D5340 03CBFAE0 002E0790 02390450 01258670 01B74540 016CE7E0
      016CE7E0 03DA9410 0037DE10 022C3110 013A2990 03A73D50 003A51F0 00277900 0034C580 002EA740 0039F4E0
      0039F4E0 02250E90 013789D0 03AC4D30 027A6BA0 01475E70 00F278A0 0145A270 01E77340 0114CAE0 039EAF90
      039EAF90 0051F850 02790470 03458640 02E74560 0194E7D0 035E9430 0378EF10 02624C40 03536A60 00FADF50
      00FADF50 0287B0F0 03C46880 02265CC0 033572A0 00AFCBF0 00F82E00 00843900 006312C0 02294DD0 013DEB30
      013DEB30 01A31EA0 037291F0 02CBD900 03AE3580 02792F40 0345B8E0 00E76490 0294D6D0 00EF5ED0 014C78D0
      014C78D0 03EA44B0 021F66E0 0110D590 0398BF50 0054E0F0 007E9080 0041D8C0 006134A0 0251AEF0 01BCBCC0
      01BCBCC0 02B17150 01E9C9F0 011D2D00 0193BB80 015A6640 01F75560 030CFFD0 008A8030 00CFC020 02A82030
      02A82030 03FE1810 02008A00 0300CF00 0280A880 03C0FCC0 022082A0 0130C3F0 01A8A200 017CF300 01C28A80
      01C28A80 0123CFC0 02D91410
     
