-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Sep 26 23:52:47 2024 UTC
-- File 20240822_052754_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-08-22T05:27:57.000.000.000 to 2024-08-22T05:27:57.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240822_052754_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03F0DB20 0008B6B0 000CEDE0 020A9B10 010FD690 03883DD0 00261190 031A8CA0 0097CAF0 00DC2F80 00B23840
      00B23840 00EB2460 029EB650 01D1ED70 01391BC0 01A59620 03775D30 036679D0 006AA290 025FF3D0 01700A30
      01700A30 01C80F20 032C08B0 02BA0CE0 01E70A90 03148FD0 009EC830 00D1AC20 015CBD10 03F971C0 0205C920
      0205C920 01072DB0 0184BB60 0346E6D0 00E595B0 00975F60 02DCF0D0 01B288B0 016BCCE0 03EF1540 030C4FF0
      030C4FF0 028A6800 03CF5C00 0228F200 033C8B00 02A2CE80 03F3A9C0 020A7D20 010F43B0 0188E260 03A649A0
      03A649A0 003AB6B0 0027EDE0 02341B10 012E1690 03B91DD0 00659330 00575AA0 027CF7F0 03428C00 02E3CA00
      02E3CA00 01C91780 0096CE20 02DDA930 03B37DA0 006AC370 005FA2C0 007073A0 02484A70 036C6F40 02DA58E0
      02DA58E0 01B77490 03B66760 0236AA60 012DFF50 03BB00F0 02668080 0355C0C0 02FF20A0 0180B0F0 0140E880
      0140E880 01E09CC0 0110D2A0 01CC5DF0 00953980 00DFA540 00B077E0 02E84C10 019C6A10 03525F10 00FB7090
      00FB7090 0286C8D0 01C5ACB0
     
