-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Sep 13 00:51:03 2024 UTC
-- File 20240808_202044_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-08-08T20:20:47.000.000.000 to 2024-08-08T20:20:47.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240808_202044_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00473A00 0064A700 0056F480 007D8EC0 004349A0 013176B0 01A9CDE0 037D2B10 00C3BE90 02A261D0 01F35130
      01F35130 010AF9A0 038F8570 024847C0 036C6420 006D2B10 032DDF40 02BB30E0 01E6A890 0315FCD0 009F02B0
      009F02B0 00D083E0 02B8C210 01E4A310 0316F290 009D8BD0 0169A710 03EEBA40 0219E760 011514D0 039F9EB0
      039F9EB0 025051E0 01787910 03C44590 00266750 023554F0 032FFE80 015C00E0 03F90040 02058060 01074050
      01074050 0384E070 02469040 0365D860 00D73450 02BCAE70 03E2F940 021385E0 028D2380 01E5D920 031735B0
      031735B0 029CAF60 01D2F8D0 033B84B0 02A646E0 01F56590 030FD750 00883CF0 00CC2280 005519E0 033FCA80
      033FCA80 02A02FC0 03F03820 00082430 000C3620 020A2D30 030F3BA0 0088A670 00CCF540 00AA8FE0 037FE400
      037FE400 01600B00 01D00E80 013809C0 01A40D20 03760BB0 02CD0E60 01AB8950 037E4DF0 02C16B00 03A1DE80
      03A1DE80 013898E0 03D26A40 023B5F60 0126F0D0 03B588B0 026F4CE0 0158EA90 03F49FD0 000ED030 0009B820
      0009B820 020D6430 0385EB10
     
