-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Sep 12 09:04:58 2024 UTC
-- File 20240808_075122_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-08-08T07:51:25.000.000.000 to 2024-08-08T07:51:25.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240808_075122_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00CD7D30 00ABC3A0 02FE2270 01C099A0 01906AB0 01585FE0 03F47010 000E4810 02096C10 010DDA10 038B3710
      038B3710 004EAC90 0269FAD0 015D07B0 02F9C230 03C29190 0023D950 023235F0 032B2F00 02BEB880 03E1E4C0
      03E1E4C0 021116A0 01199DF0 01955300 015FFA80 00F803E0 03420100 02E30180 03928140 025BC1E0 01762110
      01762110 03CD3190 002BA950 023E7DF0 03214300 02B1E280 01F489E0 03876680 0244D5C0 0366BF20 00D5E0B0
      00D5E0B0 00BF10E0 02E09890 0190D4D0 0358BEB0 02F4E1E0 018E9110 03A4ECC0 033B4D50 00A6EBF0 00F59E00
      00F59E00 008F5100 00C8F980 00AC8540 00FAC7E0 0287A410 01C47610 03264D10 025AB5C0 03BBF790 00660C50
      00660C50 02550A70 037F8F40 02C048E0 01A06C90 03705AD0 00C877B0 00AC4C60 02FA6A50 00C3AFB0 02513C30
      02513C30 0379A220 00C57330 00A7CAA0 02F42FF0 038E3800 02492400 036DB600 02DB6D00 03B6DB80 0136DB20
      0136DB20 01D6DB50 033DB6F0 02A36D80 03F2DB40 020BB6E0 010E6D90 03895B50 004DF6F0 006B0D80 005E8B40
      005E8B40 0238E770 01924A60
     
