-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Aug  7 10:30:13 2024 UTC
-- File 20240714_224415_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-07-14T22:44:18.000.000.000 to 2024-07-14T22:44:18.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240714_224415_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02E1C240 03912360 0059B2D0 02756BB0 034FDE60 00E83150 029C29F0 03D23D00 023B2380 0326B240 02B5EB60
      02B5EB60 01EF1ED0 018C48D0 01A53650 0377AD70 02CC7BC0 03AA4620 007F6530 0040D7A0 0260BC70 0350E240
      0350E240 02F89360 0184DAD0 01A35BD0 01B97B10 0365C690 00D725D0 02BCB730 03E2ECA0 00139AF0 001A5780
      001A5780 00177C40 001CC260 0212A350 008DF970 006582E0 02574390 017CE250 03C29370 0223DAC0 033237A0
      033237A0 00AB2C70 00FEBA40 0081E760 02C114D0 00D0CF50 015C5470 01F27E40 010B4160 038EE1D0 00499130
      00499130 006D59A0 025BF570 03760FC0 02CD0820 01AB8C30 02BF2510 02F05BC0 03887620 004C4D30 006A6BA0
      006A6BA0 025F5E70 0370F140 02C889E0 01ACCD10 037AAB90 00C7FE50 015200B0 02FD8070 03834040 0242E060
      0242E060 01639050 03D25870 023B7440 0326CE60 00B5A950 02EF7DF0 0398C300 012A5140 02DFBCF0 03B06280
      03B06280 026853C0 035C7A20 00F24730 008B64A0 02CED6F0 03A9BD80 027D6340 0343D2E0 02711DC0 03A4C990
      03A4C990 0076AD50 024DFBF0
     
