-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Aug  7 10:15:05 2024 UTC
-- File 20240714_091300_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-07-14T09:13:03.000.000.000 to 2024-07-14T09:13:03.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240714_091300_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00DFF2C0 00B00BA0 02E80E70 039C0940 02520DE0 017B0B10 03C68E90 0025C9D0 02372D30 032CBBA0 005D7330
      005D7330 0073CAA0 024A2FF0 036F3800 02D8A400 03B4F600 026E8D00 0359CB80 02F52E40 038FB960 022432E0
      022432E0 029B15C0 03D69F20 003DD0B0 002338E0 0232A490 012BF6D0 03BE0DB0 02610B60 01518ED0 03F949B0
      03F949B0 0302F6B0 0341C6F0 02E12580 0391B740 02596CE0 0175DA90 03CF37D0 0028AC30 003CFA20 02228730
      02228730 0333C4A0 00551370 003FCD60 02202BD0 01303E30 01A82120 037C31B0 02C22960 01A33DD0 0372A330
      0372A330 02CBF2A0 01AE0BF0 00BC8700 00716240 0049D360 026D3AD0 015BA7B0 01F67460 030D4E50 008BE970
      008BE970 00CE1DC0 00A91320 02FD9AB0 03C1ABF0 0110BF00 0198E080 015490C0 01FED8A0 0301B4F0 02816E80
      02816E80 03C1D9C0 02213520 0131AFB0 01A97860 03BEE220 0030C990 0228AD50 013CFBF0 01A28600 0173C500
      0173C500 01CA2780 012F3440 01B8AE60 0364F950 00D685F0 005EE380 0038C920 0224ADB0 0336FB60 00AD86D0
      00AD86D0 02FB45B0 0386E760
     
