-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Aug  7 10:12:47 2024 UTC
-- File 20240714_071450_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-07-14T07:14:53.000.000.000 to 2024-07-14T07:14:53.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240714_071450_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  027F9D50 014053F0 01E07A00 00882380 00661920 012A8AD0 01DFE7D0 01980A10 03540F10 00FE0890 02810CD0
      02810CD0 01C18AB0 01214FE0 03B1E810 00691C10 025D9210 01735B10 03E57B40 030BE370 028E12C0 03C91BA0
      03C91BA0 002D9670 003B5D40 0026F3E0 02358A10 012F4F10 03B8E890 00649CD0 012B6950 01DF6EF0 0130D980
      0130D980 01A8B540 017CEFE0 03C29810 0023D410 02323E10 012B2110 03BEB190 0061E950 01288EF0 00DE64C0
      00DE64C0 00B156A0 02E9FDF0 039D0300 02538280 037A43C0 02C76220 01A4D330 0176BAA0 03CDE7F0 01158A00
      01158A00 00CFA780 00A87440 00FC4E60 02826950 01C35DF0 0122F300 01B38A80 016A4FC0 01DF6820 0330DC30
      0330DC30 03545910 027F3AC0 0340A7A0 00E0F470 00908E40 00D8C960 02B4ADD0 01EEFB30 011986A0 039545F0
      039545F0 025FE700 01B80A40 02B207B0 03EB0460 001E8650 0211C570 031927C0 0295B420 01DF6E30 0130D920
      0130D920 03A8B5B0 027CEF60 02A14C60 02F8F520 01848FB0 0146C860 03E5AC50 00177A70 001CC740 0012A4E0
      0012A4E0 021BF690 01160DD0
     
