-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Aug  7 10:06:39 2024 UTC
-- File 20240714_021025_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-07-14T02:10:28.000.000.000 to 2024-07-14T02:10:28.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240714_021025_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01CAEFF0 012F9800 00DC2A00 00591F80 00759040 004F5860 0268F450 015C8E70 01F2C940 010BADE0 038E7B10
      038E7B10 00494690 026DE5D0 00AD8B90 037DA720 00C374B0 00A2CEE0 02F3A990 018A7D50 034F43F0 02E8E200
      02E8E200 039C9300 0252DA80 037BB7C0 03633610 02695680 035DFDC0 02F30320 018A82B0 014FC3E0 03E82210
      03E82210 001C3310 02122A90 011B3FD0 0396A030 032EF810 025CC200 0372A300 02CBF280 03AE0BC0 02790E20
      02790E20 01458930 01E74DA0 0314EB70 029E9EC0 03D1D1A0 001C9CB0 02096970 030DDDC0 028B3320 01CEAAB0
      01CEAAB0 0129FFE0 03BD0010 00638010 02524010 017B6010 03C6D010 0212DC00 018DD900 014B3580 01EEAF40
      01EEAF40 0119F8E0 03950490 005F86D0 027045B0 03486760 00EC54D0 029A7EB0 03EBA0F0 010F3840 0188A460
      0188A460 034CF650 00EA8D70 009FCBC0 00D02E20 02B83930 03E425A0 00163770 001D2CC0 0209DD50 008699F0
      008699F0 00C5D500 00A73F80 00F4A040 008EF060 02C98850 01AD4C70 017BEA40 01C61F60 032510D0 005BCC50
      005BCC50 013B1530 01A69FA0
     
