-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Aug  6 03:47:40 2024 UTC
-- File 20240712_205027_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-07-12T20:50:30.000.000.000 to 2024-07-12T20:50:30.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240712_205027_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  000FDEF0 00083180 000C2940 000A3DE0 020F2310 0108B290 038CEBD0 004A9E30 006FD120 025839B0 03742560
      03742560 00CE37D0 02A92C30 03FDBA20 00036730 02016A50 0080EFB0 00C09860 02A0D450 01F0BE70 0108E140
      0108E140 018C91E0 034AD910 00EFB590 02986F50 01D458F0 009F3A40 026853B0 035C7A60 00F24750 028B64F0
      028B64F0 03CED680 0229BDC0 033D6320 00A3D2B0 00F23BE0 028B2610 02E75A80 01CA7BE0 032F4610 00B8E510
      00B8E510 02E49790 0196DC50 035DB270 02F36B40 038ADEE0 004FB190 02686950 00AE2EF0 007C9CC0 0042D2A0
      0042D2A0 0263BBF0 03526600 02FB5500 0386FF80 02458040 03674060 00D4E050 02BE9070 01F0EC20 01844D10
      01844D10 03466B90 00E55E50 0297F170 03DC09C0 02320D20 012B0BB0 01BE8E60 0361C950 00D12DF0 005CDD80
      005CDD80 003959A0 0225F570 03370FC0 02AC8820 01FACC30 0107AA20 03847F30 024640A0 016560F0 01D7D080
      01D7D080 009E1C60 03688920 00DCCDB0 00B2AB60 02EBFED0 019E01B0 01510160 03F981D0 00054130 0007E1A0
      0007E1A0 02041170 01830CE0
     
