-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Aug  6 03:38:03 2024 UTC
-- File 20240712_131420_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-07-12T13:14:23.000.000.000 to 2024-07-12T13:14:23.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240712_131420_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01750460 03CF8650 00284570 003C67C0 00225420 02337E30 032AC120 00BFA1B0 00E07160 029049D0 01D86D30
      01D86D30 01345BA0 03AE7670 013CA6A0 03A2F5F0 02738F00 034A4880 02EF6CC0 0398DAA0 0054B7F0 007EEC00
      007EEC00 00419A00 00615700 0028FE40 021E40B0 031160E0 0099D090 02D538D0 01BFA4B0 016076E0 03D04D90
      03D04D90 00386B50 02245EF0 03367180 0156A4A0 01FEFB70 010186C0 018145A0 0341E770 02E114C0 03919EA0
      03919EA0 005951F0 0075F900 004F0580 00688740 022E6270 019CA9A0 0352FD70 02FB83C0 03864220 00456330
      00456330 0067D2A0 02543BF0 037E2600 02C13500 03A1AF80 0138BC20 01D27110 033B4990 00A6ED50 02F59BF0
      02F59BF0 038F5600 0248FD00 036C8380 02DAC240 03B7A360 006C72D0 012D25D0 01DDDB90 03333650 00AAAD70
      00AAAD70 00FFFBC0 00800620 02C00530 03A007A0 00700470 00480640 006C0560 032D03E0 025DC100 03732180
      03732180 02CAB140 03AFE9E0 00781D10 02441390 01661A50 03D51770 023F9CC0 032052A0 00583DF0 003A1180
      003A1180 00271940 003495E0
     
