-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Aug  6 02:33:33 2024 UTC
-- File 20240710_074106_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-07-10T07:41:09.000.000.000 to 2024-07-10T07:41:09.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240710_074106_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01CE4510 03296790 00BDD450 02E33E70 0392A140 025BF1E0 02BB0480 01F34360 030AE2D0 008F93B0 00C85A60
      00C85A60 02AC7750 01FA4CF0 01076A80 0184DFC0 0146B020 03E5E830 030B8E10 02472480 0364B6C0 02D6EDA0
      02D6EDA0 01BD9B70 016356C0 01D2FDA0 033B8370 02A642C0 03F563A0 000FD270 00041DA0 010309B0 01828D60
      01828D60 0343CBD0 00E22E30 00933920 02DAA5B0 03B7F760 006C0CD0 025A0AB0 03770FE0 02664400 01AAB300
      01AAB300 017FEA80 01C01FC0 01201020 03B01830 02681420 015C1E30 01F21120 030B19B0 028E9560 02E4EFE0
      02E4EFE0 02CB4C00 03AEEA00 02799F00 03455080 02E7F8C0 039404A0 005E06F0 00710580 00498740 006D44E0
      006D44E0 032DF340 035D8570 02F347C0 038AE420 004F9630 00685D20 025C73B0 03724A60 00CB6F50 02AED8F0
      02AED8F0 03F9B480 0102B760 03C1F660 00210D50 02318BF0 03294E00 02BDE900 03E31D80 02129340 031BDAE0
      031BDAE0 00963790 02DD2C50 00D9DD30 025A99D0 0177D530 01CC3FA0 032A2070 02BF3040 03E0A860 0010FC50
      0010FC50 02188270 0314C340
     
